Delay-optimal wiring plan for the microprocessor of high performance computing machines

Jun Kikuchi, Tetsuo Sasaki, Tohru Hashimoto, Kazuhisa Miyamoto. Delay-optimal wiring plan for the microprocessor of high performance computing machines. In Proceedings of ASP-DAC 2000, Asia and South Pacific Design Automation Conference 2000, Yokohama, Japan. pages 265-270, ACM, 2000. [doi]

Authors

Jun Kikuchi

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Tetsuo Sasaki

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Tohru Hashimoto

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Kazuhisa Miyamoto

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