Delay-optimal wiring plan for the microprocessor of high performance computing machines

Jun Kikuchi, Tetsuo Sasaki, Tohru Hashimoto, Kazuhisa Miyamoto. Delay-optimal wiring plan for the microprocessor of high performance computing machines. In Proceedings of ASP-DAC 2000, Asia and South Pacific Design Automation Conference 2000, Yokohama, Japan. pages 265-270, ACM, 2000. [doi]

@inproceedings{KikuchiSHM00,
  title = {Delay-optimal wiring plan for the microprocessor of high performance computing machines},
  author = {Jun Kikuchi and Tetsuo Sasaki and Tohru Hashimoto and Kazuhisa Miyamoto},
  year = {2000},
  doi = {10.1145/368434.368629},
  url = {http://doi.acm.org/10.1145/368434.368629},
  researchr = {https://researchr.org/publication/KikuchiSHM00},
  cites = {0},
  citedby = {0},
  pages = {265-270},
  booktitle = {Proceedings of ASP-DAC 2000, Asia and South Pacific Design Automation Conference 2000, Yokohama, Japan},
  publisher = {ACM},
  isbn = {0-7803-5974-7},
}