Minimum energy CMOS design with dual subthreshold supply and multiple logic-level gates

Kyungseok Kim, Vishwani D. Agrawal. Minimum energy CMOS design with dual subthreshold supply and multiple logic-level gates. In Proceedings of the 12th International Symposium on Quality Electronic Design, ISQED 2011, Santa Clara, California, USA, 14-16 March 2011. pages 689-694, IEEE, 2011. [doi]

Abstract

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