FPGA Prototyping of Systolic Array-based Accelerator for Low-Precision Inference of Deep Neural Networks

Soobeom Kim, Seunghwan Cho, Eunhyeok Park, Sungjoo Yoo. FPGA Prototyping of Systolic Array-based Accelerator for Low-Precision Inference of Deep Neural Networks. In IEEE International Workshop on Rapid System Prototyping, RSP 2021, Paris, France, October 14, 2021. pages 1-7, IEEE, 2021. [doi]

Abstract

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