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Seok-Yoon Kim, Nanda Gopal, Lawrence T. Pillage. AWE macromodels of VLSI interconnect for circuit simulation. In ICCAD. pages 64-70, 1992. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: HYSIM: Hybrid Fault Simulation for Synchronous Sequential CircuitsKyuchull Kim, Kewal K. Saluja. vlsi, 4(3):181-197, 1996. [doi]
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