The following publications are possibly variants of this publication:
- An Antiharmonic, Programmable, DLL-Based Frequency Multiplier for Dynamic Frequency ScalingSunghwa Ok, Kyunghoon Chung, Jabeom Koo, Chulwoo Kim. tvlsi, 18(7):1130-1134, 2010. [doi]
- A Fast Lock All-Digital Programmable N/M-ratio MDLL Frequency Multiplier Using a Variable Resolution TDCChaeyoung Jang, Pil-Ho Lee, Sang Jae Rhee, Ki-hwan Choi, Jongsun Kim. elinfocom 2022: 1-2 [doi]
- A fast-locking clock multiplying DLLJongsun Kim, Bongho Bae. isocc 2016: 253-254 [doi]
- A 120-MHz-1.8-GHz CMOS DLL-Based Clock Generator for Dynamic Frequency ScalingJin-Han Kim, Young-Ho Kwak, Moo-young Kim, Soo-Won Kim, Chulwoo Kim. jssc, 41(9):2077-2082, 2006. [doi]