Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for Wide Voltage Scaling

Min-Su Kim, Ah-Reum Kim, Yong-geol Kim, Chunghee Kim, Dong-Yeop Kim, Jong Woo Kim, Daeseong Lee, Hyun Lee, Jungyul Pyo, Youngmin Shin, Jae Cheol Son. Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for Wide Voltage Scaling. In IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy. pages 1-5, IEEE, 2018. [doi]

Authors

Min-Su Kim

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Ah-Reum Kim

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Yong-geol Kim

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Chunghee Kim

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Dong-Yeop Kim

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Jong Woo Kim

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Daeseong Lee

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Hyun Lee

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Jungyul Pyo

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Youngmin Shin

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Jae Cheol Son

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