Min-Su Kim, Ah-Reum Kim, Yong-geol Kim, Chunghee Kim, Dong-Yeop Kim, Jong Woo Kim, Daeseong Lee, Hyun Lee, Jungyul Pyo, Youngmin Shin, Jae Cheol Son. Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for Wide Voltage Scaling. In IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy. pages 1-5, IEEE, 2018. [doi]
@inproceedings{KimKKKKKLLPSS18,
title = {Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for Wide Voltage Scaling},
author = {Min-Su Kim and Ah-Reum Kim and Yong-geol Kim and Chunghee Kim and Dong-Yeop Kim and Jong Woo Kim and Daeseong Lee and Hyun Lee and Jungyul Pyo and Youngmin Shin and Jae Cheol Son},
year = {2018},
doi = {10.1109/ISCAS.2018.8351444},
url = {https://doi.org/10.1109/ISCAS.2018.8351444},
researchr = {https://researchr.org/publication/KimKKKKKLLPSS18},
cites = {0},
citedby = {0},
pages = {1-5},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy},
publisher = {IEEE},
isbn = {978-1-5386-4881-0},
}