The following publications are possibly variants of this publication:
- A 20-Gb/s 0.13-/spl mu/m CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexerPatrick Chiang, William J. Dally, Ming-Ju Edward Lee, Ramesh Senthinathan, Yangjin Oh, Mark A. Horowitz. jssc, 40(4):1004-1011, 2005. [doi]
- A 7.6 mW, 214-fs RMS jitter 10-GHz phase-locked loop for 40-Gb/s serial link transmitter based on two-stage ring oscillator in 65-nm CMOSWoo-Rham Bae, Haram Ju, Kwanseo Park, Sung-Yong Cho, Deog Kyoon Jeong. asscc 2015: 1-4 [doi]