Young-Hwa Kim, Jaewon Lee, SeongHwan Cho. A 10-bit 300MSample/s pipelined ADC using time-interleaved SAR ADC for front-end stages. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 4041-4044, IEEE, 2010. [doi]
@inproceedings{KimLC10-2,
title = {A 10-bit 300MSample/s pipelined ADC using time-interleaved SAR ADC for front-end stages},
author = {Young-Hwa Kim and Jaewon Lee and SeongHwan Cho},
year = {2010},
doi = {10.1109/ISCAS.2010.5537646},
url = {http://dx.doi.org/10.1109/ISCAS.2010.5537646},
researchr = {https://researchr.org/publication/KimLC10-2},
cites = {0},
citedby = {0},
pages = {4041-4044},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France},
publisher = {IEEE},
}