A 10-bit 300MSample/s pipelined ADC using time-interleaved SAR ADC for front-end stages

Young-Hwa Kim, Jaewon Lee, SeongHwan Cho. A 10-bit 300MSample/s pipelined ADC using time-interleaved SAR ADC for front-end stages. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 4041-4044, IEEE, 2010. [doi]

Abstract

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