7.6 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chip

Hyun-Jin Kim, Jeong-Don Lim, Jang-Woo Lee, Dae-Hoon Na, Joon-Ho Shin, Chae-Hoon Kim, Seungwoo Yu, Ji-Yeon Shin, Seon-Kyoo Lee, Devraj Rajagopal, Sang-Tae Kim, Kyeong-Tae Kang, Jeong-Joon Park, Yongjin Kwon, Min-Jae Lee, Sunghoon Kim, Seunghoon Shin, Hyung Gon Kim, Jin Tae Kim, Ki-Sung Kim, Han Sung Joo, Chan-Jin Park, Jae-Hwan Kim, Man-Joong Lee, Do-Kook Kim, Hyang-Ja Yang, Dae-Seok Byeon, Ki Tae Park, Kyehyun Kyung, Jeong-Hyuk Choi. 7.6 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chip. In 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015. pages 1-3, IEEE, 2015. [doi]

@inproceedings{KimLLNSKYSLRKKP15,
  title = {7.6 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chip},
  author = {Hyun-Jin Kim and Jeong-Don Lim and Jang-Woo Lee and Dae-Hoon Na and Joon-Ho Shin and Chae-Hoon Kim and Seungwoo Yu and Ji-Yeon Shin and Seon-Kyoo Lee and Devraj Rajagopal and Sang-Tae Kim and Kyeong-Tae Kang and Jeong-Joon Park and Yongjin Kwon and Min-Jae Lee and Sunghoon Kim and Seunghoon Shin and Hyung Gon Kim and Jin Tae Kim and Ki-Sung Kim and Han Sung Joo and Chan-Jin Park and Jae-Hwan Kim and Man-Joong Lee and Do-Kook Kim and Hyang-Ja Yang and Dae-Seok Byeon and Ki Tae Park and Kyehyun Kyung and Jeong-Hyuk Choi},
  year = {2015},
  doi = {10.1109/ISSCC.2015.7062964},
  url = {http://dx.doi.org/10.1109/ISSCC.2015.7062964},
  researchr = {https://researchr.org/publication/KimLLNSKYSLRKKP15},
  cites = {0},
  citedby = {0},
  pages = {1-3},
  booktitle = {2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-6224-2},
}