Through-silicon-via aware interconnect prediction and optimization for 3D stacked ICs - researchr publication authors

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Dae-Hyun Kim, Saibal Mukhopadhyay, Sung Kyu Lim. Through-silicon-via aware interconnect prediction and optimization for 3D stacked ICs. In Chung-Kuan Cheng, Sherief Reda, editors, The 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), San Francisco, CA, USA, July 26-27, 2009, Proceedings. pages 85-92, ACM, 2009. [doi]

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