Dae-Hyun Kim, Saibal Mukhopadhyay, Sung Kyu Lim. Through-silicon-via aware interconnect prediction and optimization for 3D stacked ICs. In Chung-Kuan Cheng, Sherief Reda, editors, The 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), San Francisco, CA, USA, July 26-27, 2009, Proceedings. pages 85-92, ACM, 2009. [doi]
@inproceedings{KimML09-1,
title = {Through-silicon-via aware interconnect prediction and optimization for 3D stacked ICs},
author = {Dae-Hyun Kim and Saibal Mukhopadhyay and Sung Kyu Lim},
year = {2009},
doi = {10.1145/1572471.1572486},
url = {http://doi.acm.org/10.1145/1572471.1572486},
tags = {optimization, context-aware},
researchr = {https://researchr.org/publication/KimML09-1},
cites = {0},
citedby = {0},
pages = {85-92},
booktitle = {The 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), San Francisco, CA, USA, July 26-27, 2009, Proceedings},
editor = {Chung-Kuan Cheng and Sherief Reda},
publisher = {ACM},
isbn = {978-1-60558-576-5},
}