Dae-Hyun Kim, Prashant J. Nair, Moinuddin K. Qureshi. Architectural Support for Mitigating Row Hammering in DRAM Memories. Computer Architecture Letters, 14(1):9-12, 2015. [doi]
@article{KimNQ15,
title = {Architectural Support for Mitigating Row Hammering in DRAM Memories},
author = {Dae-Hyun Kim and Prashant J. Nair and Moinuddin K. Qureshi},
year = {2015},
doi = {10.1109/LCA.2014.2332177},
url = {http://doi.ieeecomputersociety.org/10.1109/LCA.2014.2332177},
researchr = {https://researchr.org/publication/KimNQ15},
cites = {0},
citedby = {0},
journal = {Computer Architecture Letters},
volume = {14},
number = {1},
pages = {9-12},
}