Architectural Support for Mitigating Row Hammering in DRAM Memories

Dae-Hyun Kim, Prashant J. Nair, Moinuddin K. Qureshi. Architectural Support for Mitigating Row Hammering in DRAM Memories. Computer Architecture Letters, 14(1):9-12, 2015. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.