A Low-Jitter Open-Loop All-Digital Clock Generator with 2 Cycle Lock-Time

Moo-young Kim, Dongsuk Shin, Hyunsoo Chae, Sunghwa Ok, Chulwoo Kim. A Low-Jitter Open-Loop All-Digital Clock Generator with 2 Cycle Lock-Time. In Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007, DoubleTree Hotel, San Jose, California, USA, September 16-19, 2007. pages 369-372, IEEE, 2007. [doi]

Abstract

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