The following publications are possibly variants of this publication:
- A 32-bit carry lookahead adder design using complementary all-N-transistor logicGang-Neng Sung, Chun-Ying Juan, Chua-Chin Wang. icecsys 2008: 706-709 [doi]
- A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-LogicGe Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang. iscas 2004: 781-784
- A 32-bit carry lookahead adder using dual-path all-N logicGe Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang. tvlsi, 13(8):992-996, 2005. [doi]