Kyundong Kim, Seidai Takeda, Shinobu Miwa, Hiroshi Nakamura. A novel power-gating scheme utilizing data retentiveness on caches. In Erik Brunvard, Ken Stevens, Joseph R. Cavallaro, Tong Zhang 0002, editors, Great Lakes Symposium on VLSI 2012, GLSVLSI'12, Salt Lake Cit, UT, USA, May 3-4, 2012. pages 91-94, ACM, 2012. [doi]
Abstract is missing.