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Accurate Layout-Dependent Effect Model in 10 nm-Class DRAM Process Using Area-Efficient Array Test Circuits

Seyoung Kim, Seungho Yang, Hyein Lim, Hyein Lee, Jongwook Jeon, Jung Yun Choi, Jaeha Kim. Accurate Layout-Dependent Effect Model in 10 nm-Class DRAM Process Using Area-Efficient Array Test Circuits. IEEE Access, 11:70691-70697, 2023. [doi]

Authors

Seyoung Kim

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Seungho Yang

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Hyein Lim

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Hyein Lee

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Jongwook Jeon

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Jung Yun Choi

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Jaeha Kim

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