Accurate Layout-Dependent Effect Model in 10 nm-Class DRAM Process Using Area-Efficient Array Test Circuits

Seyoung Kim, Seungho Yang, Hyein Lim, Hyein Lee, Jongwook Jeon, Jung Yun Choi, Jaeha Kim. Accurate Layout-Dependent Effect Model in 10 nm-Class DRAM Process Using Area-Efficient Array Test Circuits. IEEE Access, 11:70691-70697, 2023. [doi]

@article{KimYLLJCK23,
  title = {Accurate Layout-Dependent Effect Model in 10 nm-Class DRAM Process Using Area-Efficient Array Test Circuits},
  author = {Seyoung Kim and Seungho Yang and Hyein Lim and Hyein Lee and Jongwook Jeon and Jung Yun Choi and Jaeha Kim},
  year = {2023},
  doi = {10.1109/ACCESS.2023.3292346},
  url = {https://doi.org/10.1109/ACCESS.2023.3292346},
  researchr = {https://researchr.org/publication/KimYLLJCK23},
  cites = {0},
  citedby = {0},
  journal = {IEEE Access},
  volume = {11},
  pages = {70691-70697},
}