Tohru Kimura, Kazuyuki Nakamura, Yoshiharu Aimoto, Takashi Manabe, Nobuyuki Yamashita, Yoshihiro Fujita, Shin'ichiro Okazaki, Masakazu Yamashina. Design of 1.28-GB/s high bandwidth 2-Mb SRAM for integrated memory array processor applications. J. Solid-State Circuits, 30(6):637-643, June 1995. [doi]
Abstract is missing.