Modelling and Verification of Timing Conditions with the Boyer Moore Prover - researchr publication authors

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D. J. Kinniment, Albert Koelmans. Modelling and Verification of Timing Conditions with the Boyer Moore Prover. In Victoria Stavridou, Thomas F. Melham, Raymond T. Boute, editors, Theorem Provers in Circuit Design, Proceedings of the IFIP TC10/WG 10.2 International Conference on Theorem Provers in Circuit Design: Theory, Practice and Experience, Nijmegen, The Netherlands, 22-24 June 1992, Proceedings. Volume A-10 of IFIP Transactions, pages 111-127, North-Holland, 1992.

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