Shiva Kiran, Shengchang Cai, Ying Luo, Sebastian Hoyos, Samuel Palermo. A 32 Gb/s ADC-Based PAM-4 Receiver with 2-bit/Stage SAR ADC and Partially-Unrolled DFE. In IEEE Custom Integrated Circuits Conference, CICC 2019, Austin, TX, USA, April 14-17, 2019. pages 1-4, IEEE, 2019. [doi]
@inproceedings{KiranCLHP19-0,
title = {A 32 Gb/s ADC-Based PAM-4 Receiver with 2-bit/Stage SAR ADC and Partially-Unrolled DFE},
author = {Shiva Kiran and Shengchang Cai and Ying Luo and Sebastian Hoyos and Samuel Palermo},
year = {2019},
doi = {10.1109/CICC.2019.8780283},
url = {https://doi.org/10.1109/CICC.2019.8780283},
researchr = {https://researchr.org/publication/KiranCLHP19-0},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {IEEE Custom Integrated Circuits Conference, CICC 2019, Austin, TX, USA, April 14-17, 2019},
publisher = {IEEE},
isbn = {978-1-5386-9395-7},
}