Low power and hardware cost STUMPS BIST

N. Ravi Kiran, G. Harish, A. Karthik, Siva Sankar Yellampalli. Low power and hardware cost STUMPS BIST. In 19th International Symposium on VLSI Design and Test, VDAT 2015, Ahmedabad, India, June 26-29, 2015. pages 1-4, IEEE, 2015. [doi]

Authors

N. Ravi Kiran

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G. Harish

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A. Karthik

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Siva Sankar Yellampalli

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