On the benefits of Collaborative Thread Throttling and HLS-Versioning in CPU-FPGA Environments

Tiago Knorst, Guilherme Korol, Michael Guilherme Jordan, Julio Costella Vicenzi, Arthur Francisco Lorenzon, Mateus Beck Rutzig, Antonio Carlos Schneider Beck. On the benefits of Collaborative Thread Throttling and HLS-Versioning in CPU-FPGA Environments. In 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, SBCCI 2022, Porto Alegre, Brazil, August 22-26, 2022. pages 1-6, IEEE, 2022. [doi]

Abstract

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