Table of Contents

• High-Throughput Multifilter VLSI Design for the AV1 Fractional Motion EstimationDaiane Freitas, Bruna Nagai, Mateus Grellert, Cláudio Machado Diniz, Guilherme Corrêa 0001. 1-6 [doi]
• High-Level Design of a 14-bit Continuous-Time Sigma-Delta Modulator with FIR DAC for Low-Voltage Audio DevicesMatheus Cortez, Alessandro Gonçalves Girardi, Paulo César Comassetto de Aguirre. 1-6 [doi]
• A custom interconnection multi-FPGA framework for distributed processing applicationsCarlos Salazar-García, Alfonso Chacón-Rodríguez, Renato Rimolo-Donadio, Ronny García-Ramírez, David Solórzano-Pacheco, Jeferson González-Gómez, Christos Strydis. 1-6 [doi]
• Comparative Analysis of Hardware Implementations of a Convolutional Neural NetworkGabriel Henrique Eisenkraemer, Leonardo Londero de Oliveira, Everton Alceu Carara. 1-6 [doi]
• Circuit Reliability Analysis with Considerations of Aging EffectSuoyue Zhan, Chunhong Chen. 1-5 [doi]
• Enhancing an Asynchronous Circuit Design Flow to Support Complex Digital System DesignMarcos Luiggi Lemos Sartori, Willian Analdo Nunes, Ney Laert Vilar Calazans. 1-6 [doi]
• A Flexible and Energy-Efficient BLAKE-256/2s Co-Processor for Blockchain-based IoT ApplicationsPham Hoai Luan, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima. 1-6 [doi]
• Deep Neural Network Feasibility Using Analog Spiking NeuronsThomas Soupizet, Zalfa Jouni, Joao Frischenbruder Sulzbach, Aziz Benlarbi-Delaï, Pietro M. Ferreira. 1-6 [doi]
• Limits for Low Supply Voltage Operation of a 5 GHz VCO to Drive a 4-Path MixerMariana Siniscalchi, Carlos Galup-Montoro, Sylvain Bourdel, Fernando Silveira. 1-5 [doi]
• Exploring Machine Learning for Electrical Behavior Prediction: The CMOS Inverter Case StudyGabriel Lima Jacinto, Lucas Yuki Imamura, Mateus Grellert, Cristina Meinhardt. 1-6 [doi]
• An All-digital Programmable Current-limited Discharge Circuitry for a Safe Electrical StimulationReza Ranjandish. 1-4 [doi]
• Secure Communication with Peripherals in NoC-based Many-coresRafael Follmann Faccenda, Gustavo Comarú, Luciano Lores Caimi, Fernando Gehm Moraes. 1-6 [doi]
• Low Noise Broadband Amplifier for Breast Cancer SystemLeonardo Rodrigues Leopoldo, Wilhelmus A. M. Van Noije. 1-5 [doi]
• A Design Procedure for Sizing Comparators in Active Rectifiers using $g_{m}/I_{D}$ TechniqueAndrea Ballo, Alfio Dario Grasso, Marco Privitera. 1-6 [doi]
• An UHD 4K@60fps Dual Self-Guided Filter Targeting the AV1 DecoderRoberta Palau, Jones Goebel, Eduardo Zummach, Ramiro Viana, Marcel Moscarelli Corrêa, Guilherme Corrêa 0001, Marcelo Schiavon Porto, Luciano Agostini. 1-6 [doi]
• Design-Time Analysis of Real-Time Traffic for Networks-on-Chip using Constraint ModelsAnderson R. P. Domingues, Sergio Johann Filho, Alexandre de Morais Amory, Fernando Gehm Moraes. 1-6 [doi]
• A Study of Motion Coding Schemes for Learned Video CompressionPeng-Yu Chen, Chih-Hsuan Lin, Wen-Hsiao Peng. 1-6 [doi]
• CSIP: A Compact Scrypt IP design with single PBKDF2 core for Blockchain miningVu Trung Duong Le, Pham Hoai Luan, Thi Hong Tran, Yasuhiko Nakashima. 1-6 [doi]
• Direction-Based Fast Mode Decision and Hardware Design for the AV1 Intra PredictionMarcel Moscarelli Corrêa, Daniel Palomino 0001, Guilherme Corrêa 0001, Luciano Agostini. 1-6 [doi]
• Methodology for an Early Exploration of Embedded Systems using Portable Test and Stimulus StandardFrederik Kautz, Holger Blume, Christian Sauer. 1-6 [doi]
• A distributed Embedded Systems IoT platform and Associated services Supporting Shopping Cart for Disabled PeopleKonstantinos Antonopoulos, Dimitris Karadimas, Alexandros Spournias, Christos Panagiotou, Ignantios Fwtiou, Ioannis Symeonidis, Christos Antonopoulos, Michael Hübner 0001, Nikolaos Voros. 1-6 [doi]
• Designing a 9.3μW Low-Power Time-to-Digital Converter (TDC) for a Time Assisted SAR ADCRodrigo N. Wuerdig, Bruno Canal, Tiago R. Balen, Sergio Bampi. 1-6 [doi]
• Protecting SRAM PUF from BTI Aging-based Cloning AttackShengyu Duan, Gaole Sai. 1-6 [doi]
• On the benefits of Collaborative Thread Throttling and HLS-Versioning in CPU-FPGA EnvironmentsTiago Knorst, Guilherme Korol, Michael Guilherme Jordan, Julio Costella Vicenzi, Arthur Francisco Lorenzon, Mateus Beck Rutzig, Antonio Carlos Schneider Beck. 1-6 [doi]
• Conversion Time-Power Tradeoff in Capacitance-to-Digital Converters with Dual-Mode LogicOrazio Aiello, Paolo Crovetti, Massimo Alioto. 1-5 [doi]
• eSi-BTC: an energy efficient Bitcoin mining coreCarlos Gewehr, Carlis Raupp, Julio Leão. 1-6 [doi]
• Hardware Design for the Separable Symmetric Normalized Wiener Filter of the AV1 DecoderRoberta Palau, Wagner Penny, Jones Goebel, Eduardo Zummach, Guilherme Corrêa 0001, Marcelo Schiavon Porto, Luciano Agostini. 1-6 [doi]
• Low-Frequency Non-Separable Transform Hardware System Design for the VVC EncoderJones Goebel, Luciano Agostini, Bruno Zatt, Marcelo Schiavon Porto. 1-6 [doi]
• Miniaturized Sign-Magnitude Stochastic-Binary FIR Filter Architecture with Enhanced AccuracyGayas Mohiuddin Sayed, Matthias Kuhl. 1-6 [doi]
• Improving Soft Error Robustness of Full Adder Circuits with Decoupling Cell and Transistor SizingRafael N. M. Oliveira, Fábio G. R. G. da Silva, Ricardo Reis 0001, Rafael B. Schvittz, Cristina Meinhardt. 1-6 [doi]
• Integrating Machine-Learning Probes into the VTR FPGA Design FlowTimothy Martin, C. Barnes, Gary William Grewal, Shawki Areibi. 1-6 [doi]
• PANACA: An Open-Source Configurable Network-on-Chip Simulation PlatformJulian Haase, Alexander Groß, Maximilian Feichter, Diana Göhringer. 1-6 [doi]
• 1.2 nW Neuromorphic Enhanced Wake-Up RadioZalfa Jouni, Thomas Soupizet, Siqi Wang, Aziz Benlarbi-Delaï, Pietro M. Ferreira. 1-6 [doi]
• Energy-Efficient Forwarding Routing Algorithm with bidirectional link quality estimator for Wireless Sensor NetworksHugo Rodríguez, Jimmy Tarrillo. 1-6 [doi]
• A 0.3 to 5-MHz Low-Voltage Digitally-Controlled Oscillator for Energy Harvesting ApplicationsLuis Felipe Machado Dutra, Alessandro Gonçalves Girardi, Lucas Compassi Severo. 1-6 [doi]
• Reliability by Design: Avoiding Migration-Induced Failure in IC InterconnectsSusann Rothe, Jens Lienig. 1-6 [doi]
• A 0.55-V Oscillator with Improved Stability Against Temperature and Supply-Voltage VariationsJader A. De Lima. 1-6 [doi]
• Edge GPU based on an FPGA Overlay Architecture using PYNQHector Gerardo Muñoz Hernandez, Florian Fricke, Muhammed Al Kadi, Marc Reichenbach, Michael Hübner 0001. 1-6 [doi]
• Transistor Reordering for Electrical Improvement in CMOS Complex GatesMarcello M. Muñoz, Henrique Kessler, Marcelo Porto, Vinicius V. Camargo. 1-6 [doi]
• Digital Defect-Oriented Test Methodology for Flipped Voltage Follower Low Dropout (LDO) Voltage RegulatorsMarampally Saikiran, Mona Ganji, Degang Chen 0001. 1-6 [doi]
• A Time-Efficient Defect Simulation Framework for Analog and Mixed Signal (AMS) CircuitsMarampally Saikiran, Mona Ganji, Degang Chen 0001. 1-6 [doi]
• Thermal-Aware Thread and Turbo Frequency Throttling Optimization for Parallel ApplicationsSandro M. Marques, Fábio D. Rossi, Marcelo Caggiani Luizelli, Antonio Carlos Schneider Beck, Arthur Francisco Lorenzon. 1-6 [doi]
• A Virtual Board Approach for Prototyping and Teaching Digital DesignAlcides S. Costa, Leonardo Droves Silveira, André Inácio Reis. 1-6 [doi]
• Error Resilience Evaluation of Approximate Storage in the Intra Prediction of VVC DecodersMatheus Isquierdo, Renira Soares, Felipe Sampaio, Bruno Zatt, Daniel Palomino 0001. 1-6 [doi]
• Advanced Thermal Management using Approximate Computing and On-Chip Thermoelectric CoolingHammam Kattan, Hussam Amrouch. 1-6 [doi]
• Time Assisted SAR ADC with Bit-guess and Digital Error CorrectionBruno Canal, Hamilton Duarte Klimach, Sergio Bampi, Tiago R. Balen. 1-6 [doi]
• A High-level Model to Leverage NoC-based Many-core ResearchIacana Ianiski Weber, Angelo Elias Dalzotto, Fernando Gehm Moraes. 1-6 [doi]