Bit-Level systolic architectures for high performance IIR filtering

S. C. Knowles, John G. McWhirter, Roger F. Woods, John V. McCanny. Bit-Level systolic architectures for high performance IIR filtering. VLSI Signal Processing, 1(1):9-24, 1989. [doi]

Authors

S. C. Knowles

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John G. McWhirter

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Roger F. Woods

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John V. McCanny

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