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S. C. Knowles, John G. McWhirter, Roger F. Woods, John V. McCanny. Bit-Level systolic architectures for high performance IIR filtering. VLSI Signal Processing, 1(1):9-24, 1989. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: A bit-level systolic architecture for very high performance IIR filtersSimon C. Knowles, John G. McWhirter, Roger F. Woods, John V. McCanny. icassp 1989: 2449-2452 [doi] Systolic IIR filters with bit level pipeliningRoger F. Woods, S. C. Knowles, John V. McCanny, John G. McWhirter. icassp 1988: 2072-2075 [doi] Optimized bit level architectures for IIR filteringO. C. McNally, John V. McCanny, Roger F. Woods. iccd 1990: 302-306 [doi]
The following publications are possibly variants of this publication: