Chen-Ting Ko, Ting-Kuei Kuan, Ruei-Pin Shen, Chih-Hsien Chang. A 7-nm FinFET CMOS PLL With 388-fs Jitter and -80-dBc Reference Spur Featuring a Track-and-Hold Charge Pump and Automatic Loop Gain Control. J. Solid-State Circuits, 55(4):1043-1050, 2020. [doi]
@article{KoKSC20,
title = {A 7-nm FinFET CMOS PLL With 388-fs Jitter and -80-dBc Reference Spur Featuring a Track-and-Hold Charge Pump and Automatic Loop Gain Control},
author = {Chen-Ting Ko and Ting-Kuei Kuan and Ruei-Pin Shen and Chih-Hsien Chang},
year = {2020},
doi = {10.1109/JSSC.2019.2959735},
url = {https://doi.org/10.1109/JSSC.2019.2959735},
researchr = {https://researchr.org/publication/KoKSC20},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {55},
number = {4},
pages = {1043-1050},
}