Hidetomo Kobayashi, Kiyoshi Kato, Takuro Ohmaru, Seiichi Yoneda, Tatsuji Nishijima, Shuhei Maeda, Kazuaki Ohshima, Hikaru Tamura, Hiroyuki Tomatsu, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Jun Koyama, Shunpei Yamazaki. Processor with 4.9-μs break-even time in power gating using crystalline In-Ga-Zn-oxide transistor. In 2013 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVI, Yokohama, Japan, April 17-19, 2013. pages 1-3, IEEE, 2013. [doi]
@inproceedings{KobayashiKOYNMO13,
title = {Processor with 4.9-μs break-even time in power gating using crystalline In-Ga-Zn-oxide transistor},
author = {Hidetomo Kobayashi and Kiyoshi Kato and Takuro Ohmaru and Seiichi Yoneda and Tatsuji Nishijima and Shuhei Maeda and Kazuaki Ohshima and Hikaru Tamura and Hiroyuki Tomatsu and Tomoaki Atsumi and Yutaka Shionoiri and Yukio Maehashi and Jun Koyama and Shunpei Yamazaki},
year = {2013},
doi = {10.1109/CoolChips.2013.6547913},
url = {http://dx.doi.org/10.1109/CoolChips.2013.6547913},
researchr = {https://researchr.org/publication/KobayashiKOYNMO13},
cites = {0},
citedby = {0},
pages = {1-3},
booktitle = {2013 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVI, Yokohama, Japan, April 17-19, 2013},
publisher = {IEEE},
isbn = {978-1-4673-5780-7},
}