Tetsu Kobayashi, Shigeyuki Sato, Hideya Iwasaki. Efficient Use of Hardware Transactional Memory for Parallel Mesh Generation. In 44th International Conference on Parallel Processing, ICPP 2015, Beijing, China, September 1-4, 2015. pages 600-609, IEEE Computer Society, 2015. [doi]
@inproceedings{KobayashiSI15,
title = {Efficient Use of Hardware Transactional Memory for Parallel Mesh Generation},
author = {Tetsu Kobayashi and Shigeyuki Sato and Hideya Iwasaki},
year = {2015},
doi = {10.1109/ICPP.2015.69},
url = {http://doi.ieeecomputersociety.org/10.1109/ICPP.2015.69},
researchr = {https://researchr.org/publication/KobayashiSI15},
cites = {0},
citedby = {0},
pages = {600-609},
booktitle = {44th International Conference on Parallel Processing, ICPP 2015, Beijing, China, September 1-4, 2015},
publisher = {IEEE Computer Society},
isbn = {978-1-4673-7587-0},
}