Kyosuke Kobinata, Tatsuya Funaki, Yoshiaki Satake, Hitoshi Matsuno, Seiji Hidaka, Shunsuke Abe, Hiroyuki Ito, Chih-Cheng Hsiao, Sheng-Yi Li, Young-Suk Kim, Takayuki Ohba. Low-ESL (<1 pH @ 8.5 GHz) Multi-Terminal Si Capacitor Embedded in 3D Functional Interposer for Power Delivery Network. In IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022. pages 385-386, IEEE, 2022. [doi]
@inproceedings{KobinataFSMHAIH22,
title = {Low-ESL (<1 pH @ 8.5 GHz) Multi-Terminal Si Capacitor Embedded in 3D Functional Interposer for Power Delivery Network},
author = {Kyosuke Kobinata and Tatsuya Funaki and Yoshiaki Satake and Hitoshi Matsuno and Seiji Hidaka and Shunsuke Abe and Hiroyuki Ito and Chih-Cheng Hsiao and Sheng-Yi Li and Young-Suk Kim and Takayuki Ohba},
year = {2022},
doi = {10.1109/VLSITechnologyandCir46769.2022.9830411},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830411},
researchr = {https://researchr.org/publication/KobinataFSMHAIH22},
cites = {0},
citedby = {0},
pages = {385-386},
booktitle = {IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
publisher = {IEEE},
isbn = {978-1-6654-9772-5},
}