Peter M. Kogge, Toshio Sunaga, Hisatada Miyataka, Koji Kitamura, Eric Retter. Combined DRAM and logic chip for massively parallel systems. In 16th Conference on Advanced Research in VLSI (ARVLSI 95), March 27-29, 1995, Chapel Hill, North Carolina, USA. pages 4-16, IEEE Computer Society, 1995. [doi]
@inproceedings{KoggeSMKR95,
title = {Combined DRAM and logic chip for massively parallel systems},
author = {Peter M. Kogge and Toshio Sunaga and Hisatada Miyataka and Koji Kitamura and Eric Retter},
year = {1995},
doi = {10.1109/ARVLSI.1995.515607},
url = {http://doi.ieeecomputersociety.org/10.1109/ARVLSI.1995.515607},
tags = {logic},
researchr = {https://researchr.org/publication/KoggeSMKR95},
cites = {0},
citedby = {0},
pages = {4-16},
booktitle = {16th Conference on Advanced Research in VLSI (ARVLSI 95), March 27-29, 1995, Chapel Hill, North Carolina, USA},
publisher = {IEEE Computer Society},
}