Silicon validation of LUT-based logic-locked IP cores

Gaurav Kolhe, Tyler Sheaves, Kevin Immanuel Gubbi, Tejas Kadale, Setareh Rafatirad, Sai Manoj PD, Avesta Sasan, Hamid Mahmoodi, Houman Homayoun. Silicon validation of LUT-based logic-locked IP cores. In Rob Oshana, editor, DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10 - 14, 2022. pages 1189-1194, ACM, 2022. [doi]

Abstract

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