A 14 µM × 26 µM 20-GB/S 3-MW CDR Circuit with High Jitter Tolerance

Long Kong, Yikun Chang, Behzad Razavi. A 14 µM × 26 µM 20-GB/S 3-MW CDR Circuit with High Jitter Tolerance. In 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, June 18-22, 2018. pages 271-272, IEEE, 2018. [doi]

Abstract

Abstract is missing.