A 16b 1.62MS/s Calibration-free SAR ADC with 86.6dB SNDR utilizing DAC Mismatch Cancellation Based on Symmetry

Shota Konno, Yuichi Miyahara, Kazuki Sobue, Koichi Hamashita. A 16b 1.62MS/s Calibration-free SAR ADC with 86.6dB SNDR utilizing DAC Mismatch Cancellation Based on Symmetry. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2020, Virtual Event, Japan, November 9-11, 2020. pages 1-2, IEEE, 2020. [doi]

Abstract

Abstract is missing.