SPARC M7: A 20 nm 32-Core 64 MB L3 Cache Processor

Georgios K. Konstadinidis, Hongping Penny Li, Francis Schumacher, Venkat Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert P. Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister, Jeffrey Brooks, Ha Pham, Sebastian Turullols, Yifan YangGong, Robert T. Golla, Alan P. Smith 0002, Ali Vahidsafa. SPARC M7: A 20 nm 32-Core 64 MB L3 Cache Processor. J. Solid-State Circuits, 51(1):79-91, 2016. [doi]

Abstract

Abstract is missing.