A 28.3 mW PA-Closed Loop for Linearity and Efficiency Improvement Integrated in a + 27.1 dBm WCDMA CMOS Power Amplifier

Shouhei Kousai, Kohei Onizuka, Takashi Yamaguchi, Yasuhiko Kuriyama, Masami Nagaoka. A 28.3 mW PA-Closed Loop for Linearity and Efficiency Improvement Integrated in a + 27.1 dBm WCDMA CMOS Power Amplifier. J. Solid-State Circuits, 47(12):2964-2973, 2012. [doi]

Authors

Shouhei Kousai

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Kohei Onizuka

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Takashi Yamaguchi

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Yasuhiko Kuriyama

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Masami Nagaoka

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