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Mario Kovac, N. Ranganathan, M. Varanasi. SIGMA: A VLSI Chip for Galois Field GF(2:::m:::) Based Multiplication and Division. In VLSI Design. pages 25-30, 1993.
Possibly Related PublicationsThe following publications are possibly variants of this publication: SIGMA: a VLSI systolic array implementation of a Galois field GF(2 :::m:::) based multiplication and division algorithmMario Kovac, N. Ranganathan, M. Varanasi. tvlsi, 1(1):22-30, 1993. [doi] ACE: A VLSI Chip for Galois Field GF (2:::m:::) Based ExponentiationMario Kovac, N. Ranganathan. vlsid 1994: 291-296
The following publications are possibly variants of this publication: