Concurrent Error Detection in Sequential Circuits Implemented Using Embedded Memory of LUT-Based FPGAs

Andrzej Krasniewski. Concurrent Error Detection in Sequential Circuits Implemented Using Embedded Memory of LUT-Based FPGAs. In 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 10-13 October 2004, Cannes, France, Proceedings. pages 487-495, IEEE Computer Society, 2004. [doi]

Abstract

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