A 10-Gb/s CMOS clock and data recovery circuit with an analog phase interpolator

Rainer Kreienkamp, Ulrich Langmann, Christoph Zimmermann, Takuma Aoyama. A 10-Gb/s CMOS clock and data recovery circuit with an analog phase interpolator. In Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003. pages 73-76, IEEE, 2003. [doi]

Abstract

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