A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications

I.-Ning Ku, Zhiwei Xu, Yen-Cheng Kuan, Yen-Hsiang Wang, Mau-Chung Frank Chang. A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications. J. Solid-State Circuits, 47(8):1854-1865, 2012. [doi]

Authors

I.-Ning Ku

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Zhiwei Xu

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Yen-Cheng Kuan

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Yen-Hsiang Wang

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Mau-Chung Frank Chang

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