I.-Ning Ku, Zhiwei Xu, Yen-Cheng Kuan, Yen-Hsiang Wang, Mau-Chung Frank Chang. A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications. J. Solid-State Circuits, 47(8):1854-1865, 2012. [doi]
@article{KuXKWC12,
title = {A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications},
author = {I.-Ning Ku and Zhiwei Xu and Yen-Cheng Kuan and Yen-Hsiang Wang and Mau-Chung Frank Chang},
year = {2012},
doi = {10.1109/JSSC.2012.2196731},
url = {http://dx.doi.org/10.1109/JSSC.2012.2196731},
researchr = {https://researchr.org/publication/KuXKWC12},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {47},
number = {8},
pages = {1854-1865},
}