An Efficient Simulator for Multiport Interconnects with Model Order Reduction Technique - researchr publication

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Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai. An Efficient Simulator for Multiport Interconnects with Model Order Reduction Technique. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A(6):1214-1219, 2002. [doi]

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