2 1R1W 8T SRAM Arrays Operating Down to 560 mV Utilizing Small-Signal Sensing With Charge Shared Bitline and Asymmetric Sense Amplifier in 14 nm FinFET CMOS Technology

Jaydeep P. Kulkarni, John Keane, Kyung-Hoae Koo, Satyanand Nalam, Zheng Guo, Eric Karl, Kevin Zhang. 2 1R1W 8T SRAM Arrays Operating Down to 560 mV Utilizing Small-Signal Sensing With Charge Shared Bitline and Asymmetric Sense Amplifier in 14 nm FinFET CMOS Technology. J. Solid-State Circuits, 52(1):229-239, 2017. [doi]

@article{KulkarniKKNGKZ17,
  title = {2 1R1W 8T SRAM Arrays Operating Down to 560 mV Utilizing Small-Signal Sensing With Charge Shared Bitline and Asymmetric Sense Amplifier in 14 nm FinFET CMOS Technology},
  author = {Jaydeep P. Kulkarni and John Keane and Kyung-Hoae Koo and Satyanand Nalam and Zheng Guo and Eric Karl and Kevin Zhang},
  year = {2017},
  doi = {10.1109/JSSC.2016.2607219},
  url = {http://dx.doi.org/10.1109/JSSC.2016.2607219},
  researchr = {https://researchr.org/publication/KulkarniKKNGKZ17},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {52},
  number = {1},
  pages = {229-239},
}