Vinay B. Y. Kumar, Kulshreshth Dhiman, Mandar Datar, Akash Pacharne, H. Narayanan, Sachin B. Patkar. Relaxation Based Circuit Simulation Acceleration over CPU-FPGA. In 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, VLSID 2016, Kolkata, India, January 4-8, 2016. pages 409-414, IEEE Computer Society, 2016. [doi]
@inproceedings{KumarDDPNP16,
title = {Relaxation Based Circuit Simulation Acceleration over CPU-FPGA},
author = {Vinay B. Y. Kumar and Kulshreshth Dhiman and Mandar Datar and Akash Pacharne and H. Narayanan and Sachin B. Patkar},
year = {2016},
doi = {10.1109/VLSID.2016.84},
url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2016.84},
researchr = {https://researchr.org/publication/KumarDDPNP16},
cites = {0},
citedby = {0},
pages = {409-414},
booktitle = {29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, VLSID 2016, Kolkata, India, January 4-8, 2016},
publisher = {IEEE Computer Society},
isbn = {978-1-4673-8700-2},
}