A Simulation Based Buffer Sizing Algorithm for Network on Chips

Anish S. Kumar, M. Pawan Kumar, Srinivasan Murali, V. Kamakoti, Luca Benini, Giovanni De Micheli. A Simulation Based Buffer Sizing Algorithm for Network on Chips. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India. pages 206-211, IEEE Computer Society, 2011. [doi]

@inproceedings{KumarKMKBM11,
  title = {A Simulation Based Buffer Sizing Algorithm for Network on Chips},
  author = {Anish S. Kumar and M. Pawan Kumar and Srinivasan Murali and V. Kamakoti and Luca Benini and Giovanni De Micheli},
  year = {2011},
  doi = {10.1109/ISVLSI.2011.72},
  url = {http://dx.doi.org/10.1109/ISVLSI.2011.72},
  tags = {rule-based},
  researchr = {https://researchr.org/publication/KumarKMKBM11},
  cites = {0},
  citedby = {0},
  pages = {206-211},
  booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India},
  publisher = {IEEE Computer Society},
}