Amit Kumar, Sudhakar M. Reddy, Irith Pomeranz, Bernd Becker. TSV and DFT cost aware circuit partitioning for 3D-SOCs. In Keith A. Bowman, Kamesh V. Gadepally, Pallab Chatterjee, Mark M. Budnik, Lalitha Immaneni, editors, Thirteenth International Symposium on Quality Electronic Design, ISQED 2012, Santa Clara, CA, USA, March 19-21, 2012. pages 21-26, IEEE, 2012. [doi]
@inproceedings{KumarRPB12,
title = {TSV and DFT cost aware circuit partitioning for 3D-SOCs},
author = {Amit Kumar and Sudhakar M. Reddy and Irith Pomeranz and Bernd Becker},
year = {2012},
doi = {10.1109/ISQED.2012.6187469},
url = {http://dx.doi.org/10.1109/ISQED.2012.6187469},
researchr = {https://researchr.org/publication/KumarRPB12},
cites = {0},
citedby = {0},
pages = {21-26},
booktitle = {Thirteenth International Symposium on Quality Electronic Design, ISQED 2012, Santa Clara, CA, USA, March 19-21, 2012},
editor = {Keith A. Bowman and Kamesh V. Gadepally and Pallab Chatterjee and Mark M. Budnik and Lalitha Immaneni},
publisher = {IEEE},
isbn = {978-1-4673-1034-5},
}