Vandana Kumari, Manoj Saxena, Mridula Gupta. Variability Investigation of Double Gate JunctionLess (DG-JL) Transistor for Circuit Design Perspective. In Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh, editors, VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers. Volume 711 of Communications in Computer and Information Science, pages 496-503, Springer, 2017. [doi]
@inproceedings{KumariSG17,
title = {Variability Investigation of Double Gate JunctionLess (DG-JL) Transistor for Circuit Design Perspective},
author = {Vandana Kumari and Manoj Saxena and Mridula Gupta},
year = {2017},
doi = {10.1007/978-981-10-7470-7_49},
url = {https://doi.org/10.1007/978-981-10-7470-7_49},
researchr = {https://researchr.org/publication/KumariSG17},
cites = {0},
citedby = {0},
pages = {496-503},
booktitle = {VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers},
editor = {Brajesh Kumar Kaushik and Sudeb Dasgupta and Virendra Singh},
volume = {711},
series = {Communications in Computer and Information Science},
publisher = {Springer},
isbn = {978-981-10-7470-7},
}